************************************** * File: R&D11.ASM * * Purpose: Automatic Guitar Tuner * * Team: E-A-D-G-B-E * * Designers: Ron Holmes & Dan Gates * ************************************** MEM EQU $B6E0 ;reserve 1 memory byte for debugging MEM2 EQU $B6E1 ;reserve 2 memory bytes for storing each sample MEM3 EQU $B6E3 ;reserve 2 memory bytes for final result TFLG1 EQU $1023 ;registers for input compare TMSK1 EQU $1022 TIC1 EQU $1010 TCTL2 EQU $1021 R_EDGE EQU $10 ;mask for setting input to rising edge IC1F EQU $04 ;mask for clearing the input compare flag ********************************************************************************************* ORG $B600 ;start of program LDAA #%11111111 ;mask to set port C direction STAA $1007 ;location of DDRC control reister for port C LDAA #$00 STAA $1003 ;set tuner motor to off WAIT LDAA #R_EDGE ;we are going to wait in this loop until STAA TCTL2 ;a string is plucked. LDAA #IC1F STAA TFLG1 LDAA #IC1F ANDA TFLG1 BEQ WAIT ;when string is plucked jump into a 1.5 second delay *1.5 sec delay ldy #$007C ;set up delay outer loop size jsr delay ;delay for 1 second START: LDD #$0000 ;load register D with zero STD MEM ;clear each memory location STD MEM2 ;by sending the 0's in the D reister STD MEM3 ;out to the memory locations. LDX #10 ;load register X with the number of samples to be taken SETUP LDS #$01FF ;set the stack pointer to this value DES ;decrement the stack to get it set up DES ;this creates a false stack TSY ;transfer the new stack pointer value to the Y register LDAA #R_EDGE ;load register A with edge trigger mask STAA TCTL2 ;send A to the control register for edge triggering LDAA #IC1F ;load register A with clear flag mask STAA TFLG1 ;clear the input compare flag TEST LDAA #IC1F ;beginning of the first edge capture ANDA TFLG1 ;AND register A with the input to see if there is a signal BEQ TEST ;loop back if this was a false start LDD TIC1 ;bring the start time, first edge, in to register D STD 0,Y ;store the value to the false stack LDAA #IC1F ;clear the timer flag and get it ready for the second edge STAA TFLG1 TEST2 LDAA #IC1F ;beginning of the second edge capture ANDA TFLG1 ;AND register A with the input to see if there is a signal BEQ TEST2 ;loop back if second edge hasn't arrived yet LDD TIC1 ;bring the end time, second edge, in to register D SUBD 0,Y ;subtract the first edge time from the second edge time STAA MEM ;store the result to memory for debugging TAB ;transfer those results to register B ANDA #$00 ;clear register A ADDD MEM2 ;add these results with other sampled results STD MEM2 ;store the sum back to memory DEX ;decrement the sample counter BGT SETUP ;if count is not at zero then go back and get another sample LDD MEM2 ;if count is zero the bring the total sum into Register D LDX #$000A ;load register X with the number of samples IDIV ;Divide the sum by the number of samples to get an average STX MEM3 ;store the sampled average to memory *Tuned too low? CPX #$0060 ;check to see if the string is tuned BHI TUNE_UP ;if the pitch is too high jump to TUNE_DOWN routine *In tune? * CPX #$0060 ;if the pitch is not too high check to see if it's tuned * BHS STOP ;if the string is tuned then STOP the program *Tuned too low? BRA STOP ;if the string is not too high or in tune then NOP ;it must be too low so jump to TUNE_UP routine ********************************************************************************************* ************************************** * Subroutine to tune the guitar down * ************************************** TUNE_DOWN: LDAA #%01000001 STAA $1003 BRA START ************************************** * Subroutine to tune the guitar up * ************************************** TUNE_UP: LDAA #%01000001 STAA $1003 BRA START ************************************** * Subroutine to stop tuning and end * ************************************** STOP: LDAA #%00000000 STAA $1003 BRA START ************************************ * delay: delay subroutine * * Pass outer loop value in Y * ************************************ delay: LDX #$0FFF ;inner delay loop delay2: DEX BNE delay2 DEY BNE delay RTS